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19-0536; Rev 3; 9/08
Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits
General Description
The MAX6715A-MAX6729A/MAX6797A are ultra-low-voltage microprocessor (P) supervisory circuits designed to monitor two or three system power-supply voltages. These devices assert a system reset if any monitored supply falls below its factory-trimmed or adjustable threshold and maintain reset for a minimum timeout period after all supplies rise above their thresholds. The integrated dual/triple supervisory circuits significantly improve system reliability and reduce size compared to separate ICs or discrete components. These devices monitor primary supply voltages (VCC1) from 1.8V to 5.0V and secondary supply voltages (VCC2) from 0.9V to 3.3V with factory-trimmed reset threshold voltage options (see the Reset Voltage Threshold Suffix Guide). An externally adjustable RSTIN input option allows customers to monitor a third supply voltage down to 0.62V. These devices are guaranteed to be in the correct reset output logic state when either VCC1 or VCC2 remains greater than 0.8V. A variety of push-pull or open-drain reset outputs along with watchdog input, manual-reset input, and power-fail input/output features are available (see the Selector Guide). Select reset timeout periods from 1.1ms to 1120ms (min) (see the Reset Timeout Period Suffix Guide). The MAX6715A-MAX6729A/MAX6797A are available in small 5-, 6-, and 8-pin SOT23 packages and operate over the -40C to +125C temperature range.
Features
o VCC1 (Primary Supply) Reset Threshold Voltages from 1.58V to 4.63V o VCC2 (Secondary Supply) Reset Threshold Voltages from 0.79V to 3.08V o Externally Adjustable RSTIN Threshold for Auxiliary/Triple-Voltage Monitoring (0.62V Internal Reference) o Watchdog Timer Option 35s (min) Long Startup Period 1.12s (min) Normal Timeout Period o Manual-Reset Input Option o Power-Fail Input/Power-Fail Output Option (Push-Pull and Open-Drain Active-Low) o Guaranteed Reset Valid Down to VCC1 or VCC2 = 0.8V o Reset Output Logic Options o Immune to Short VCC Transients o Low Supply Current 14A (typ) at 3.6V o Watchdog Disable Feature o Small 5-, 6-, and 8-Pin SOT23 Packages
MAX6715A-MAX6729A/MAX6797A
Ordering Information
PART MAX6715AUT_ _D_+T MAX6716AUT_ _D_+T MAX6717AUK_ _D_+T MAX6718AUK_ _D_+T MAX6719AUT_ _D_+T MAX6720AUT_ _D_+T TEMP RANGE -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C PINPACKAGE 6 SOT23 6 SOT23 5 SOT23 5 SOT23 6 SOT23 6 SOT23
Applications
Multivoltage Systems Telecom/Networking Equipment Computers/Servers Portable/BatteryOperated Equipment Industrial Equipment Printers/Fax Machines Set-Top Boxes
Typical Operating Circuit
DC-DC OUT2 CONVERTER OUT1 VCC1 VCC2 I/O CORE SUPPLY SUPPLY RESET I/O NMI P
+Denotes a lead-free/RoHS-compliant package. T = Tape and reel.
UNREGULATED DC
IN
1.8V
0.9V
R1
MAX6715AMAX6729A/ MAX6797A RST
RSTIN/PFI MR WDI PFO MAX67_ _
Note: The first "_ _" are placeholders for the threshold voltage levels of the devices. Desired threshold levels are set by the part number suffix found in the Reset Voltage Threshold Suffix Guide. The "_" after the D is a placeholder for the reset timeout delay time. Desired delay time is set using the timeout period suffix found in the Reset Timeout Period Suffix Guide. For example, the MAX6716AUTLTD3-T is a dual-voltage supervisor V TH 1 = 4.625V, VTH2 = 3.075V, and 210ms (typ) timeout period. Ordering Information continued at end of data sheet. Pin Configurations and Selector Guide appear at end of data sheet.
1
R2
PUSHBUTTON SWITCH
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Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits MAX6715A-MAX6729A/MAX6797A
ABSOLUTE MAXIMUM RATINGS
Terminal Voltage (with respect to GND) VCC1, VCC2 ..........................................................-0.3V to +6V Open-Drain RST, RST1, RST2, PFO, RST ................-0.3V to +6V Push-Pull RST, RST1, PFO, RST...............-0.3V to (VCC1 + 0.3V) Push-Pull RST2 .........................................-0.3V to (VCC2 + 0.3V) RSTIN, PFI, MR, WDI ................................................-0.3V to +6V Input Current/Output Current (all pins) ...............................20mA Continuous Power Dissipation (TA = +70C) 5-Pin SOT23-5 (derate 7.1mW/C above +70C) ........571mW 6-Pin SOT23-6 (derate 8.7mW/C above +70C) ........696mW 8-Pin SOT23-8 (derate 8.9mW/C above +70C) ........714mW Operating Temperature Range .........................-40C to +125C Storage Temperature Range .............................-65C to +150C Junction Temperature ......................................................+150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC1 = 0.8V to 5.5V, VCC2 = 0.8V to 5.5V, GND = 0V, TA = -40C to +125C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER Supply Voltage SYMBOL VCC VCC1 < 5.5V all I/O connections open, outputs not asserted VCC1 < 3.6V all I/O connections open, outputs not asserted VCC2 < 3.6V all I/O connections open, outputs not asserted VCC2 < 2.75V all I/O connections open, outputs not asserted L (falling) M (falling) T (falling) S (falling) VCC1 Reset Threshold VTH1 R (falling) Z (falling) Y (falling) W (falling) V (falling) T (falling) S (falling) R (falling) Z (falling) Y (falling) W (falling) VCC2 Reset Threshold VTH2 V (falling) I (falling) H (falling) G (falling) F (falling) E (falling) D (falling) 4.500 4.250 3.000 2.850 2.550 2.250 2.125 1.620 1.530 3.000 2.850 2.550 2.250 2.125 1.620 1.530 1.350 1.275 1.080 1.020 0.810 0.765 CONDITIONS MIN 0.8 15 10 4 3 4.625 4.375 3.075 2.925 2.625 2.313 2.188 1.665 1.575 3.075 2.925 2.625 2.313 2.188 1.665 1.575 1.388 1.313 1.110 1.050 0.833 0.788 TYP MAX 5.5 39 28 A 11 9 4.750 4.500 3.150 3.000 2.700 2.375 2.250 1.710 1.620 3.150 3.000 2.700 2.375 2.250 1.710 1.620 1.425 1.350 1.140 1.080 0.855 0.810 V V UNITS V
ICC1 Supply Current ICC2
2
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Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits
ELECTRICAL CHARACTERISTICS (continued)
(VCC1 = 0.8V to 5.5V, VCC2 = 0.8V to 5.5V, GND = 0V, TA = -40C to +125C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER Reset Threshold Tempco Reset Threshold Hysteresis VCC to Reset Output Delay SYMBOL VTH/C VHYST tRD Referenced to VTH typical VCC1 = (VTH1 + 100mV) to (VTH1 - 100mV) or VCC2 = (VTH2 + 75mV) to (VTH2 - 75mV) D1 D2 D7 (MAX6797A only) Reset Timeout Period tRP D8 (MAX6797A only) D3 D5 D6 D4 RSTIN Input Threshold RSTIN Input Current RSTIN Hysteresis RSTIN to Reset Output Delay PFI Input Threshold PFI Input Current PFI Hysteresis PFI to PFO Delay tRSTIND VPFI IPFI VPFH tDPF VIL VIH 0.7 VCC1 1 100 tMR 25 First watchdog period after reset timeout period Normal mode WDI Pulse Width WDI Input Voltage WDI Input Current tWDI VIL VIH IWDI WDI = 0V or VCC1 0.7 VCC1 -1 +1 (Note 2) 200 50 80 (VPFI + 30mV) to (VPFI - 30mV) VRSTIN to (VRSTIN - 30mV) 611 -100 3 2 0.3 VCC1 VRSTIN IRSTIN 1.1 8.8 17.5 35 140 280 560 1120 611 -100 3 22 626.5 642 +100 CONDITIONS MIN TYP 20 0.5 20 1.65 13.2 26.25 52.5 210 420 840 1680 626.5 2.2 17.6 35 70 280 560 1120 2240 642 +100 mV nA mV s mV nA mV s ms MAX UNITS ppm/C % s
MAX6715A-MAX6729A/MAX6797A
ADJUSTABLE RESET COMPARATOR INPUT (MAX6719A/MAX6720A/MAX6723A-MAX6727A)
POWER-FAIL INPUT (MAX6728A/MAX6729A)
MANUAL-RESET INPUT (MAX6715A-MAX6722A/MAX6725A-MAX6729A) MR Input Voltage MR Minimum Pulse Width MR Glitch Rejection MR to Reset Delay MR Pullup Resistance WATCHDOG INPUT (MAX6721A-MAX6729A) Watchdog Timeout Period tWD 35 1.12 50 0.3 VCC1 54 1.68 72 2.24 ns V A s V s ns ns k
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3
Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits MAX6715A-MAX6729A/MAX6797A
ELECTRICAL CHARACTERISTICS (continued)
(VCC1 = 0.8V to 5.5V, VCC2 = 0.8V to 5.5V, GND = 0V, TA = -40C to +125C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER RESET/POWER-FAIL OUTPUTS VCC1 or VCC2 0.8V, ISINK = 1A, output asserted VCC1 or VCC2 1.0V, ISINK = 50A, output asserted VOL VCC1 or VCC2 1.2V, ISINK = 100A, output asserted VCC1 or VCC2 2.7V, ISINK = 1.2mA, output asserted VCC1 or VCC2 4.5V, ISINK = 3.2mA, output asserted VCC1 1.8V, ISOURCE = 200A, output not asserted VOH VCC1 2.7V, ISOURCE = 500A, output not asserted VCC1 4.5V, ISOURCE = 800A, output not asserted VCC1 1.8V, ISOURCE = 200A, output not asserted VOH VCC1 2.7V, ISOURCE = 500A, output not asserted VCC1 4.5V, ISOURCE = 800A, output not asserted VCC1 1.0V, ISOURCE = 1A, reset asserted RST Output HIGH (Push-Pull Only) VCC1 1.8V, ISOURCE = 150A, reset asserted VOH VCC1 2.7V, ISOURCE = 500A, reset asserted VCC1 4.5V, ISOURCE = 800A, reset asserted VCC1 or VCC2 1.8V, ISINK = 500A, reset not asserted RST Output LOW (Push-Pull or Open Drain) VOL VCC1 or VCC2 2.7V, ISINK = 1.2mA, reset not asserted VCC1 or VCC2 4.5V, ISINK = 3.2mA, reset not asserted Output not asserted Output asserted 0.8 VCC1 0.8 VCC1 0.8 VCC1 0.8 VCC2 0.8 VCC2 0.8 VCC2 0.8 VCC1 0.8 VCC1 0.8 VCC1 0.8 VCC1 0.3 0.3 0.4 0.5 0.5 A A V V V V 0.3 0.3 0.3 0.3 0.4 V SYMBOL CONDITIONS MIN TYP MAX UNITS
RST/RST1/RST2/PFO Output LOW (Push-Pull or Open-Drain)
RST/RST1/PFO Output HIGH (Push-Pull Only)
RST2 Output HIGH (Push-Pull Only)
RST/RST1/RST2/PFO Output Open-Drain Leakage Current RST Output Open-Drain Leakage Current
Note 1: Devices tested at TA = +25C. Overtemperature limits are guaranteed by design and not production tested. Note 2: Parameter guaranteed by design. 4 _______________________________________________________________________________________
Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits
Typical Operating Characteristics
(VCC1 = 5V, VCC2 = 3.3V, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE (VCC1 = +5V, VCC2 = +3.3V)
MAX6715A-29A toc01
MAX6715A-MAX6729A/MAX6797A
SUPPLY CURRENT vs. TEMPERATURE (VCC1 = +3.3V, VCC2 = +2.5V)
MAX6715A-29A toc02
SUPPLY CURRENT vs. TEMPERATURE (VCC1 = +2.5V, VCC2 = +1.8V)
18 16 SUPPLY CURRENT (A) 14 12 10 8 6 4 2 0 ICC2 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) TOTAL
MAX6715A-29A toc03
20 18 16 SUPPLY CURRENT (A) 14 12 10 8 6 4 2 0 ICC2 TOTAL ICC1
20 18 16 SUPPLY CURRENT (A) 14 12 10 8 6 4 2 0 ICC2 ICC1 TOTAL
20
ICC1
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
SUPPLY CURRENT vs. TEMPERATURE (VCC1 = +1.8V, VCC2 = +1.2V)
MAX6715A-29A toc04
NORMALIZED/RESET WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE
MAX6715A-29A toc05
MAXIMUM VCC TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE
MAXIMUM VCC TRANSIENT DURATION (s) RESET OCCURS ABOVE THIS LINE 1000
MAX6715A-29A toc06
20 18 16 SUPPLY CURRENT (A) 14 12 10 8 6 4 2 0 ICC2 ICC1 TOTAL
1.020 RESET/WATCHDOG TIMEOUT PERIOD 1.016 1.012 1.008 1.004 1.000 0.996 0.992 0.988 0.984 0.980
10,000
100
10 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) 1 10 100 1000 RESET THRESHOLD OVERDRIVE (mV)
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
NORMALIZED VCC RESET THRESHOLD vs. TEMPERATURE
MAX6715A-29A toc07
RESET INPUT AND POWER-FAIL INPUT THRESHOLD vs. TEMPERATURE
MAX6715A-29A toc08
VCC TO RESET DELAY vs. TEMPERATURE
75mV OVERDRIVE 19 VCC TO RESET DELAY (s) 18 17 16 15 14 13 12 11 10
MAX6715A-29A toc09
1.008 1.007 1.006 RESET THRESHOLD 1.005 1.004 1.003 1.002 1.001 1.000 0.999 0.998
638 637 636 RESET THRESHOLD 635 634 633 632 631 630 629 628
20
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
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5
Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits MAX6715A-MAX6729A/MAX6797A
Typical Operating Characteristics (continued)
(VCC1 = 5V, VCC2 = 3.3V, TA = +25C, unless otherwise noted.)
RSTIN INPUT TO RESET OUTPUT DELAY vs. TEMPERATURE
MAX6715A-29A toc10
POWER-FAIL INPUT TO POWER-FAIL OUTPUT DELAY vs. TEMPERATURE
30mV OVERDRIVE 1.9 POWER-FAIL DELAY (s) 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 0V -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
MAX6715A-29A toc11
MR TO RESET OUTPUT DELAY
MAX6715A-29A toc12
24 22 20 18 16 14 12
30mV OVERDRIVE
2.0
RSTIN TO RESET DELAY (s)
VMR 2V/div 0V
VRST 2V/div
1.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) 50ns/div
Pin Description
PIN
MAX6728A/ MAX6715A/ MAX6717A/ MAX6719A/ MAX6721A/ MAX6723A/ MAX6725A/ MAX6727A MAX6729A/ MAX6716A MAX6718A MAX6720A MAX6722A MAX6724A MAX6726A MAX6797A NAME FUNCTION
1
1
1
1
1
1
1, 4
1
RST/ RST1
Active-Low Reset Output, Open-Drain or Push-Pull. RST/RST1 changes from high to low when VCC1 or VCC2 drops below the selected reset thresholds, RSTIN is below threshold, MR is pulled low, or the watchdog triggers a reset. RST/RST1 remains low for the reset timeout period after VCC1/ VCC2/RSTIN exceed the device reset thresholds, MR goes low to high, or the watchdog triggers a reset. Opendrain outputs require an external pullup resistor. Push-pull outputs are referenced to VCC1.
6
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Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits
Pin Description (continued)
PIN MAX6728A/ MAX6715A/ MAX6717A/ MAX6719A/ MAX6721A/ MAX6723A/ MAX6725A/ MAX6727A MAX6729A/ MAX6716A MAX6718A MAX6720A MAX6722A MAX6724A MAX6726A MAX6797A NAME FUNCTION
MAX6715A-MAX6729A/MAX6797A
5
--
--
--
--
--
--
--
RST2
Active-Low Reset Output, Open-Drain or Push-Pull. RST2 changes from high to low when VCC1 or VCC2 drops below the selected reset thresholds or MR is pulled low. RST2 remains low for the reset timeout period after VCC1/VCC2 exceed the device reset thresholds or MR goes low to high. Open-drain outputs require an external pullup resistor. Push-pull outputs are referenced to VCC2. Ground Active-Low Manual-Reset Input. Internal 50k pullup to VCC1. Pull low to force a reset. Reset remains active as long as MR is low and for the reset timeout period after MR goes high. Leave unconnected or connect to VCC1 if unused. Secondary Supply Voltage Input. Powers the device when it is above VCC1 and input for secondary reset threshold monitor. Primary Supply Voltage Input. Powers the device when it is above VCC2 and input for primary reset threshold monitor.
2
2
2
2
2
2
2
2
GND
3
3
3
3
--
5
5
5
MR
4
4
4
4
4
6
6
6
VCC2
6
5
6
6
6
8
8
8
VCC1
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7
Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits MAX6715A-MAX6729A/MAX6797A
Pin Description (continued)
PIN MAX6728A/ MAX6715A/ MAX6717A/ MAX6719A/ MAX6721A/ MAX6723A/ MAX6725A/ MAX6727A MAX6729A/ MAX6716A MAX6718A MAX6720A MAX6722A MAX6724A MAX6726A MAX6797A NAME FUNCTION
--
--
--
5
3
3
3
3
WDI
Watchdog Input. If WDI remains high or low for longer than the watchdog timeout period, the internal watchdog timer runs out and the reset output asserts for the reset timeout period. The internal watchdog timer clears whenever a reset is asserted or WDI sees a rising or falling edge. The watchdog has a long startup period (35s min) after each reset event and a short watchdog timeout period (1.12s min) after the first valid WDI transition. Leave WDI unconnected to disable the watchdog timer. The WDI unconnected-state detector uses a small 200nA current source. Therefore, do not connect WDI to anything that will source more than 50nA. Undervoltage Reset Comparator Input. Highimpedance input for adjustable reset monitor. The reset output is asserted when RSTIN falls below the 0.626V internal reference voltage. Set the monitored voltage reset threshold with an external resistor-divider network. Connect RSTIN to VCC1 or VCC2 if not used.
--
--
5
--
5
7
7
--
RSTIN
8
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Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits
Pin Description (continued)
PIN MAX6715A/ MAX6717A/ MAX6719A/ MAX6721A/ MAX6723A/ MAX6725A/ MAX6727A MAX6729A/ MAX6716A MAX6718A MAX6720A MAX6722A MAX6724A MAX6726A
MAX6797A MAX6728A/
MAX6715A-MAX6729A/MAX6797A
NAME
FUNCTION
--
--
--
--
--
--
--
7
PFI
--
--
--
--
--
--
--
4
PFO
--
--
--
--
--
4
--
--
RST
Power-Fail Voltage Monitor Input. Highimpedance input for internal power-fail monitor comparator. Connect PFI to an external resistordivider network to set the power-fail threshold voltage (0.626V typical internal reference voltage). Connect to GND, VCC1, or VCC2 if not used. Active-Low Power-Fail Monitor Output, OpenDrain or Push-Pull. PFO is asserted low when PFI is less than 0.626V. PFO deasserts without a reset timeout period. Opendrain outputs require an external pullup resistor. Push-pull outputs are referenced to VCC1. Active-High Reset Output, Open-Drain or Push-Pull. RST changes from low to high when VCC1 or VCC2 drops below selected reset thresholds, RSTIN is below threshold, MR is pulled low, or the watchdog triggers a reset. RST remains HIGH for the reset timeout period after VCC1/VCC2/RSTIN exceed the device reset thresholds, MR goes low to high, or the watchdog triggers a reset. Opendrain outputs require an external pullup resistor. Push-pull outputs are referenced to VCC1.
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9
Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits MAX6715A-MAX6729A/MAX6797A
Detailed Description
Supply Voltages
The MAX6715A-MAX6729A/MAX6797A P supervisory circuits maintain system integrity by alerting the P to fault conditions. These ICs are optimized for systems that monitor two or three supply voltages. The outputreset state is guaranteed to remain valid while either VCC1 or VCC2 is above 0.8V.
Adjustable Input Voltage
The MAX6719A/MAX6720A and MAX6723A-MAX6727A provide an additional input to monitor a third system voltage. The threshold voltage at RSTIN is typically 626mV. Connect a resistor-divider network to the circuit as shown in Figure 1 to establish an externally controlled threshold voltage, VEXT_TH. VEXT_TH = 626mV((R1 + R2)/R2) Low-leakage current at RSTIN allows the use of largevalued resistors resulting in reduced power consumption of the system.
Threshold Levels
Input-voltage threshold level combinations are indicated by a two-letter code in the Reset Voltage Threshold Suffix Guide (Table 1). Contact factory for availability of other voltage threshold combinations.
Reset Outputs
The MAX6715A-MAX6729A/MAX6797A provide an active-low reset output (RST) and the MAX6725A/ MAX6726A also provide an active-high (RST) output. RST, RST, RST1, and RST2 are asserted when the voltage at either V CC1 or V CC2 falls below the voltage threshold level, RSTIN drops below threshold, or MR is pulled low. Once reset is asserted, it stays low for the reset timeout period (see Table 2). If VCC1, VCC2, or RSTIN goes below the reset threshold before the reset timeout period is completed, the internal timer restarts. The MAX6715A/MAX6717A/MAX6719A/MAX6721A/ MAX6723A/MAX6725A/MAX6727A/MAX6728A contain open-drain reset outputs, while the MAX6716A/ MAX6718A/MAX6720A/MAX6722A/MAX6724A/ MAX6726A/MAX6729A/MAX6797A contain push-pull reset outputs. The MAX6727A provides two separate open-drain RST outputs driven by the same internal logic.
Watchdog Input
The watchdog monitors P activity through the watchdog input (WDI). To use the watchdog function, connect WDI to a bus line or P I/O line. When WDI remains high or low for longer than the watchdog timeout period, the reset output asserts. The MAX6721A-MAX6729A/MAX6797A include a dualmode watchdog timer to monitor P activity. The flexible timeout architecture provides a long period initial watchdog mode, allowing complicated systems to complete lengthy boots, and a short period normal watchdog mode, allowing the supervisor to provide quick alerts when processor activity fails. After each reset event (VCC power-up/brownout, manual reset, or watchdog reset), there is a long initial watchdog period of 35s minimum. The long watchdog period mode provides an extended time for the system to power-up and fully initialize all P and system components before assuming responsibility for routine watchdog updates.
Manual-Reset Input
Many P-based products require manual-reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic-low on MR asserts the reset output. Reset remains asserted while MR is low for the reset timeout period (tRP) after MR returns high. This input has an internal 50k pullup resistor to VCC1 and can be left unconnected if not used. MR can be driven with CMOS logic levels, or with open-drain/collector outputs. Connect a normally open momentary switch from MR to GND to create a manualreset function; external debounce circuitry is not required. If MR is driven from long cables or if the device is used in a noisy environment, connect a 0.1F capacitor from MR to GND to provide additional noise immunity.
VEXT_TH R1
MAX6719A/ MAX6720A/ MAX6723A- RSTIN MAX6727A
R2 GND
Figure 1. Monitoring a Third Voltage
10
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Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits
The normal watchdog timeout period (1.12s min) begins after the first transition on WDI before the conclusion of the long initial watchdog period (Figure 2). During the normal operating mode, the supervisor will issue a reset pulse for the reset timeout period if the P does not update the WDI with a valid transition (high-tolow or low-to-high) within the standard timeout period (1.12s min). Leave WDI unconnected to disable the watchdog timer. The WDI unconnected-state detector uses a small (200nA typ) current source. Therefore, do not connect WDI to anything that will source more than 50nA.
Ensuring a Valid Reset Output Down to VCC = 0V
The MAX6715A-MAX6729A/MAX6797A are guaranteed to operate properly down to VCC = 0.8V. In applications that require valid reset levels down to VCC = 0V, use a pulldown resistor at RST to ground. The resistor value used is not critical, but it must be large enough not to load the reset output when VCC is above the reset threshold. For most applications, 100k is adequate. This configuration does not work for the open-drain outputs of the MAX6715A/MAX6717A/MAX6719A/MAX6721A/ MAX6723A/MAX6725A/MAX6727A/MAX6728A. For pushpull, active-high RST output connect the external resistor as a pullup from RST to VCC1.
A)
VIN R1 PFI R2
MAX6715A-MAX6729A/MAX6797A
Power-Fail Comparator
PFI is the noninverting input to a comparator. If PFI is less than VPFI (626.5mV), PFO goes low. Common uses for the power-fail comparator include monitoring preregulated input of the power supply (such as a battery) or providing an early power-fail warning so software can conduct an orderly system shutdown. It can also be used to monitor supplies other than VCC1 or VCC2 by setting the power-fail threshold with a resistor-divider, as shown in Figure 3. PFI is the input to the power-fail comparator. The typical comparator delay is 2s from PFI to PFO. Connect PFI to ground of VCC1 if unused.
MAX6728A/ MAX6729A/ MAX6797A
PFO
VTRIP = VPFI
+ ( R1R2R2 )
GND
B)
VTH VCC tWDI-NORMAL 1.12s MAX tWDI-STARTUP 35s MAX WDI 1.12s MAX
VIN GND R2 VCC R1 PFI
MAX6728A/ MAX6729A/ MAX6797A
PFO
VTRIP = R2 (VPFI) VPFI = 626.5mV
[(
1 + 1 - VCC R1 R2 R1
)
]
RST
tRP
Figure 2. Normal Watchdog Startup Sequence
Figure 3. Using Power-Fail Input to Monitor an Additional Power-Supply a) VIN is Positive b) VIN is Negative
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11
Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits MAX6715A-MAX6729A/MAX6797A
Applications Information
Interfacing to Ps with Bidirectional Reset Pins
Most Ps with bidirectional reset pins can interface directly to open-drain RST output options. Systems simultaneously requiring a push-pull RST output and a bidirectional reset interface can be in logic contention. To prevent contention, connect a 4.7k resistor between RST and the P's reset I/O port as shown in Figure 4. The current through R2 should be at least 2.5A to ensure that the 100nA (max) PFI input current does not significantly shift the trip points. Therefore, R2 < VPFI/10A < 62k for most applications. R3 will provide additional hysteresis for PFO push-pull (VOH = VCC1) or open-drain (VOH = VPULLUP) applications.
Monitoring an Additional Power Supply
These P supervisors can monitor either positive or negative supplies using a resistor voltage-divider to PFI. PFO can be used to generate an interrupt to the P or cause reset to assert (Figure 3).
Adding Hysteresis to the Power-Fail Comparator
The power-fail comparator has a typical input hysteresis of 3mV. This is sufficient for most applications where a power-supply line is being monitored through an external voltage-divider (see the Power-Fail Comparator section). If additional noise margin is desired, connect a resistor between PFO and PFI as shown in Figure 5. Select the values of R1, R2, and R3 so PFI sees VPFI (626mV) when VEXT falls to its power-fail trip point (VFAIL) and when VIN rises to its power-good trip point (VGOOD). The hysteresis window extends between the specified VFAIL and VGOOD thresholds. R3 adds the additional hysteresis by sinking current from the R1/R2 divider network when PFO is logic-low and sourcing current into the network when PFO is logic-high. R3 is typically an order of magnitude greater than R1 or R2.
Monitoring a Negative Voltage
The power-fail comparator can be used to monitor a negative supply voltage using the circuit shown in Figure 3. When the negative supply is valid, PFO is low. When the negative supply voltage drops, PFO goes high. The circuit's accuracy is affected by the PFI threshold tolerance, VCC, R1, and R2.
Negative-Going VCC Transients The MAX6715A-MAX6729A/MAX6797A supervisors are relatively immune to short-duration negative-going VCC transients (glitches). It is usually undesirable to reset the P when VCC experiences only small glitches. The Typical Operating Characteristics show Maximum Transient Duration vs. Reset Threshold Overdrive, for which reset pulses are not generated. The graph was produced using negative-going VCC pulses, starting above VTH and ending below the reset threshold by the
VCC1 VCC2
RESET TO OTHER SYSTEM COMPONENTS
A
R3
VGOOD VFAIL
VIN
MAX6715A- MAX6729A/ MAX6797A
VCC2 VCC1 RST
VEXT
MAX6729A
R1 PFI R2 PFO
PFO
4.7k RESET
P
GND
GND
GND
VGOOD = DESIRED VEXT GOOD VOLTAGE THRESHOLD VFAIL = DESIRED VEXT FAIL VOLTAGE THRESHOLD VOH = VCC1 (FOR PUSH-PULL PFO) R2 = 50k (FOR > 10A R2 CURRENT) R1 = R2 ((VGOOD - VPFI) - (VPFI)(VGOOD - VFAIL)/VOH)/VPFI R3 = (R1 x VOH)/(VGOOD - VFAIL)
Figure 4. Interfacing to Ps with Bidirectional Reset I/O
Figure 5. Adding Hysteresis to Power-Fail for Push-Pull PFO
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Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits
magnitude indicated (reset threshold overdrive). The graph shows the maximum pulse width that a negativegoing VCC transient may typically have without causing a reset pulse to be issued. As the amplitude of the transient increases (i.e., goes farther below the reset threshold), the maximum allowable pulse width decreases. A 0.1F bypass capacitor mounted close to the VCC pin provides additional transient immunity.
MAX6715A-MAX6729A/MAX6797A
START
SET WDI HIGH PROGRAM CODE
Watchdog Software Considerations
Setting and resetting the watchdog input at different points in the program, rather than "pulsing" the watchdog input high-low-high or low-high-low, helps the watchdog timer to closely monitor software execution. This technique avoids a "stuck" loop where the watchdog timer continues to be reset within the loop, keeping the watchdog from timing out. Figure 6 shows an example flow diagram where the I/O driving the watchdog input is set high at the beginning of the program, set low at the beginning of every subroutine or loop, then set high again when the program returns to the beginning. If the program should "hang" in any subroutine, the I/O is continually set low and the watchdog timer is allowed to time out, causing a reset or interrupt to be issued.
SUBROUTINE OR PROGRAM LOOP SET WDI LOW HANG IN SUBROUTINE
SUBROUTINE COMPLETED
RETURN
Figure 6. Watchdog Flow Diagram
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Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits MAX6715A-MAX6729A/MAX6797A
Functional Diagram
VCC1 MR
VCC1
MR PULLUP VCC1
VCC1 VREF VCC2 RESET TIMEOUT PERIOD
VCC2
RESET OUTPUT DRIVER
RST RST
RSTIN/PFI PFO VCC1
VREF
VCC1 WATCHDOG TIMER WDI
VREF/2
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Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits
Selector Guide
PART NUMBER MAX6715A MAX6716A MAX6717A MAX6718A MAX6719A MAX6720A MAX6721A MAX6722A MAX6723A MAX6724A MAX6725A MAX6726A MAX6727A MAX6728A MAX6729A MAX6797A NUMBER OF VOLTAGE MONITORS 2 2 2 2 3 3 2 2 3 3 3 3 3 2 2 2 OPENDRAIN RESET 2 -- 1 -- 1 -- 1 -- 1 -- 1 -- 2 1 -- -- OPENDRAIN RESET -- -- -- -- -- -- -- -- -- -- 1 -- -- -- -- -- PUSHPULL RESET -- 2 -- 1 -- 1 -- 1 -- 1 -- 1 -- -- 1 1 PUSHPULL RESET -- -- -- -- -- -- -- -- -- -- -- 1 -- -- -- -- MANUAL RESET -- -- WATCHDOG INPUT -- -- -- -- -- -- POWERFAIL INPUT/ OUTPUT -- -- -- -- -- -- -- -- -- -- -- -- -- (open drain) (push-pull) (open drain)
MAX6715A-MAX6729A/MAX6797A
Ordering Information (continued)
PART MAX6721AUT_ _D_+T MAX6722AUT_ _D_+T MAX6723AUT_ _D_+T MAX6724AUT_ _D_+T MAX6725AKA_ _D_+T MAX6726AKA_ _D_+T MAX6727AKA_ _D_+T MAX6728AKA_ _D_+T MAX6729AKA_ _D_+T MAX6797AKA_ _D_+T TEMP RANGE -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C PINPACKAGE 6 SOT23 6 SOT23 6 SOT23 6 SOT23 8 SOT23 8 SOT23 8 SOT23 8 SOT23 8 SOT23 8 SOT23
+Denotes a lead-free/RoHS-compliant package. T = Tape and reel.
Note: The first "_ _" are placeholders for the threshold voltage levels of the devices. Desired threshold levels are set by the part number suffix found in the Reset Voltage Threshold Suffix Guide. The "_" after the D is a placeholder for the reset timeout delay time. Desired delay time is set using the timeout period suffix found in the Reset Timeout Period Suffix Guide. For example, the MAX6716AUTLTD3-T is a dual-voltage supervisor V TH 1 = 4.625V, VTH2 = 3.075V, and 210ms (typ) timeout period.
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Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits MAX6715A-MAX6729A/MAX6797A
Table 1. Reset Voltage Threshold Suffix Guide**
PART NUMBER SUFFIX (_ _) LT MS MR TZ SY RY TW SV RV TI SH RH TG SF RF TE SD RD ZW YV ZI YH ZG YF ZE YD WI VH WG VF WE VD VCC1 NOMINAL VOLTAGE THRESHOLD (V) 4.625 4.375 4.375 3.075 2.925 2.625 3.075 2.925 2.625 3.075 2.925 2.625 3.075 2.925 2.625 3.075 2.925 2.625 2.313 2.188 2.313 2.188 2.313 2.188 2.313 2.188 1.665 1.575 1.665 1.575 1.665 1.575 VCC2 NOMINAL VOLTAGE THRESHOLD (V) 3.075 2.925 2.625 2.313 2.188 2.188 1.665 1.575 1.575 1.388 1.313 1.313 1.110 1.050 1.050 0.833 0.788 0.788 1.665 1.575 1.388 1.313 1.110 1.050 0.833 0.788 1.388 1.313 1.110 1.050 0.833 0.788
Table 2. Reset Timeout Period Suffix Guide
TIMEOUT PERIOD SUFFIX D1 D2 D7 D8 D3 D5 D6 D4 ACTIVE TIMEOUT PERIOD MIN (ms) 1.1 8.8 17.5 35.0 140 280 560 1120 MAX (ms) 2.2 17.6 35.0 70.0 280 560 1120 2240
D7 and D8 timeout periods are only available for the MAX6797A.
**Standard versions are shown in bold and are available in a D3 timeout option only. Standard versions require 2,500 piece order increments and are typically held in sample stock. There is a 10,000 order increment on nonstandard versions. Other threshold voltages may be available, contact factory for availability.
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Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits
Pin Configurations
TOP VIEW
MAX6715A-MAX6729A/MAX6797A
RST1 1
6
VCC1
RST 1
5
VCC1
RST 1
6
VCC1
GND 2
MAX6715A/ MAX6716A
5
RST2
GND 2
MAX6717A/ MAX6718A
4 VCC2
GND 2
MAX6719A/ MAX6720A
5
RSTIN
MR 3
4
VCC2
MR 3
MR 3
4
VCC2
SOT23
SOT23
SOT23
RST 1
6
VCC1
RST 1
6
VCC1
RST GND
1 2 3
8 7
VCC1 RSTIN VCC2 MR
GND 2
MAX6721A/ MAX6722A
5
WDI
GND 2
MAX6723A/ MAX6724A
5
RSTIN
WDI
MAX6725A/ MAX6726A
6 5
MR 3
4
VCC2
WDI 3
4
VCC2
RST 4
SOT23
SOT23
SOT23
RST GND WDI
1 2
8 7
VCC1 RSTIN VCC2 MR
RST GND WDI
1 2 3
8 7
VCC1 PFI VCC2 MR
MAX6727A
3 6 5 RST 4 PFO 4
MAX6728A/ MAX6729A/ MAX6797A
6 5
SOT23
SOT23
Chip Information
TRANSISTOR COUNT: 1072 PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 5 SOT23 6 SOT23 8 SOT23 PACKAGE CODE U5-1 U6-1 K8SN-1 DOCUMENT NO. 21-0057 21-0058 21-0078
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Dual/Triple, Ultra-Low-Voltage, SOT23 P Supervisory Circuits MAX6715A-MAX6729A/MAX6797A
Revision History
REVISION NUMBER 0 1 2 3 REVISION DATE 4/06 7/06 6/08 9/08 Initial release Updated Ordering Information. Added the MAX6797A to Ordering Information, Electrical Characteristics, Pin Description, Detailed Description, Figures 4 and 5, Selector Guide, Table 2, Pin Configurations. Updated Selector Guide. DESCRIPTION PAGES CHANGED -- 1, 15 1, 2, 6-11, 12, 15-17 15
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
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